The present invention relates in general to crosspoint switch ports and in particular to a crosspoint switch permitting dynamic port operating mode selection.
U.S. Pat. No. 5,710,550 entitled xe2x80x9cApparatus for Programmable Signal Switchingxe2x80x9d issued Jan. 20, 1998 to Hsieh et al (""550), describes a crossbar (or crosspoint) switch having a set of input/output (I/O) terminals interconnected by an array of pass transistors, one for each possible pair of I/O terminals. Each pass transistor links the corresponding pair of I/O terminals so that when the transistor is turned on, it provides a bidirectional signal path between those two I/O terminals. The crosspoint switch also includes a random access memory (RAM) storing a data word corresponding to each I/O terminal. Each bit of the data word controls the on/off state of a pass transistor linking that I/O terminal to some other I/O terminal. An external host computer can make or break routing paths by writing data to various RAM addresses. A serial bus links the host computer to a memory controller. When the host computer sends routing control data and a RAM address to the memory controller via the serial bus, the memory controller writes that data to the routing control RAM, thereby making and/or breaking routing paths to the switch port corresponding to that address.
When a crosspoint switch is used in some high speed applications, it is important that host computer be able to quickly command the crosspoint switch to make or break a routing path. To specify a routing path change, the host computer must send a relatively large amount of data over the serial bus. It therefore takes a relatively long time for a routing path change to occur once the host computer decides it wants to make the path change. To speed up routing data transfer, Hsieh""s system includes a parallel bus linking the host computer to the memory controller. The parallel bus is made wide enough to convey all of the information the memory controller needs to write a word to the RAM controlling routing paths through the crosspoint switch. This system therefore enables the host computer to command a routing change in one parallel bus data cycle. However since the width of the parallel bus is proportional to the number of switch terminals, the required parallel bus width becomes impractically large as the number of switch terminals increases.
A crosspoint switch is useful for selectively routing both digital and analog signals between lines or buses connected to its terminals. However since a pass transistor can degrade a digital signal, it is helpful to provide a port at each I/O terminal that can buffer a signal before it enters the switch at that terminal or after it departs the switch from the terminal. U.S. Pat. No. 5,734,334 entitled xe2x80x9cProgrammable Port for Crossbar Switchxe2x80x9d issued Mar. 31, 1998 to Hsieh et al (""334) describes a crossbar (crosspoint) switch having a port at each of its terminals. Each port may operate in either an analog mode or in any one of several digital modes depending on the type of signal being routed through the crosspoint switch. In its analog mode the port simply passes an analog signal entering or leaving the crosspoint switch terminal without buffering it. In all digital modes the port buffers any digital signal entering or leaving the switch terminal. In a digital bidirectional mode, the port buffers digital signals both entering and leaving the port terminal. In a unidirectional input mode, the port buffers signals entering the terminal and blocks signals leaving the terminal. Conversely, in a unidirectional output mode, the port buffers signals leaving the terminal but block signals arriving at the terminal. The port also has tristate bidirectional and unidirectional mode in which signals are buffered only when an externally generated tristate control signal is asserted. A set of tristate control lines are provided in parallel to each port and each port may be programmed to select any one of those lines as its tristate control input. A host computer can change the operating mode of any port or select its source of tristate control signal by transmitting programming data to that port through a serial bus linking the host computer to all switch ports. That same serial bus also delivers routing data from the host computer to the memory controller for the routing control RAM.
In some high speed applications, it would be beneficial if the host computer could not only quickly make or break a routing path between two ports but also to quickly change the operating modes of the two ports. However, in the system described by the ""334 patent, since the host computer must transmit the routing control data and the port mode control data over the same serial bus, the operation cannot be carried out quickly. Even when the number of switch terminals is small enough that it is practical to send routing control data via a parallel bus as taught by the ""550 patent, the time the host requires to transmit mode control data to the two ports involved in a routing change extends the overall time needed to carry out that routing change.
What is needed is a crosspoint switch having a large number of ports with selectable operating modes that allows a host computer to quickly change both a routing path between any two ports as well as the operating modes of the two ports.
A crosspoint switch in accordance with the present invention includes a large number of input/output (I/O) terminals and a separate pass transistor linking each possible pair of I/O terminals. When a pass transistor is turned on, it provides a signal path between the pair of I/O terminals it links. The crosspoint switch also includes a separate port connected to each I/O terminal for buffering a signal before it enters or after it leaves an I/O terminal. Each port can operate in one of several operating modes, with a current mode of operation selected by mode control data. The crosspoint switch also includes a random access memory (RAM) having a separate addressable storage location corresponding to each I/O.
In accordance with one aspect of the invention each RAM storage location stores routing data for controlling the pass transistors connected to a corresponding switch I/O terminal and also stores mode control data controlling the mode of the port connected to that I/O terminal.
In accordance with another aspect of the invention, the crosspoint switch also includes a memory controller for concurrently writing routing and mode control data to a storage location of the RAM. Thus by writing data to one RAM storage location, the memory controller can make and/or break signal paths between a selected switch I/O terminal and one or more other switch I/O terminals and, at the same time, can select the operating mode of the selected switch I/O terminal.
In accordance with a further aspect of the invention, the memory controller includes an input for receiving a parallel data command from a host computer. That parallel data command contains information referencing two I/O terminals, indicates whether a connection between the two I/O terminals is to be made or broken and indicates an operating mode for the ports connected to those two terminals. The memory controller responds to the command by writing data to the RAM locations corresponding to the two I/O terminals. That data causes the switch to make or break the connection and select the operating modes of the two ports as indicated by the command.
In accordance with yet another aspect of the invention, the memory controller decodes the command to determine what two RAM storage locations are to receive data and to determine what data is to be written to those two storage locations. A parallel command having a relatively small number of bits tells the memory controller to write a relatively large amount of data to the RAM. The manner in which the memory controller decodes the command is controlled by programming data from the host computer.
It is accordingly an object of the invention to provide a crosspoint switch having a large number of ports with selectable operating modes that allows a host computer to quickly change both the routing path between any two ports as well as the operating modes of the two ports by sending the switch a relatively small amount of data.